1. Field of the Invention
The present invention relates to a technology for fabricating an epitaxial substrate which is appropriate for the generation of a group III nitride crystal having excellent crystal quality.
2. Description of the Background Art
A group-III nitride crystal has been used as a material constituting a semiconductor device such as a photonic device and an electronic device, and has gained the spotlight in recent years as a semiconductor material constituting a rapid IC chip for use in a portable telephone. In particular, an AlN film has received attention as a material for application to a field emitter.
For such device applications, a group-III nitride crystal is ideally provided as free-standing one. Under the current circumstances, however, a group-III nitride crystal is typically provided in the form of a so-called epitaxial substrate such that the group-III nitride crystal having a thickness of the order, at most, of 10 μm (to such a degree that no warpage resulting from a difference in coefficient of thermal expansion occurs) is epitaxially formed on a predetermined single crystal base because of problems with crystal quality, manufacturing costs and the like. In general, thin film formation methods such as an MOCVD (metal-organic chemical vapor deposition) process and an MBE (molecular beam epitaxy) process are used to form such an epitaxial substrate.
In the epitaxial substrate having such a construction, however, a difference in lattice constant exists between the base and the group-III nitride crystal to give rise to dislocations resulting from such a lattice mismatch at an interface therebetween. Such dislocations thread through the group-III nitride film serving as a device functional layer, and most of the dislocations propagate to the surface thereof. To attain good device characteristics, there is a need to minimize the dislocations propagating to the device functional layer.
An ELO process has been proposed to improve the crystal quality resulting from the lattice mismatch between the base and the group-III nitride crystal. See, for example, Akira Sakai and Akira Usui, “Reduction of dislocation density in GaN films by epitaxial lateral overgrowth,” “OYO BUTURI,” The Japan Society of Applied Physics, Vol. 68, No. 7, pp. 774-779 (1999). The process utilizes an epitaxial lateral overgrowth technique using a mask and the like to reduce a dislocation density.
In addition, a technology for achieving reduction in dislocations in a GaN layer by polishing the surface of the base layer so that steps are formed on an atomic scale, and then, growing the GaN layer is well-known (as disclosed, for example, in Japanese Patent No. 3427047).
It is necessary to improve the crystal quality as much as possible in order to increase the performance of a functional device when a group-III nitride crystal is formed on a base for the function as the functional device. For instance, it is necessary to minimize the dislocation density. The reduction in dislocation density promises to achieve, for example, an increase in light emitting efficiency for a light-emitting device, a decrease in dark current for a photodetector device, and an increase in mobility for an electronic device.
However, although a technique disclosed in the above-mentioned non-patent literature “OYO BUTURI” can reduce dislocations of a group-III nitride crystal, there has been a problem that a step for the formation of a mask is needed.
Furthermore, when forming a device with use of the technique disclosed in the Japanese Patent No. 3427047, as a greater off angle is provided to an underlayer, more specifically, as a larger step is provided to the underlayer, crystalline of a device layer (specifically GaN) formed on the underlayer becomes improved, however, it may cause an undesirable situation in which a step resulting from the step of the underlayer exists on an upper surface of the device layer and the deterioration of device characteristics is produced. Moreover, when forming a device layer containing AlN, there is also a problem that a pit readily occurs on a surface of the device layer.